#BIAS AMP 2 TUTORIAL PC#

This resistor, in combination with the eight picofarads of input capacitance (see Figure 4), gave the customer a pole at 42 kHz. The input resistor was 470 kΩ, so the customer put a 470 kΩ in the feedback. Because of the low corner frequency, the resistors and capacitors were rather large (see Figure 3). A customer was using an AD8628 CMOS op amp in a 1 Hz, Sallen-Key low-pass filter circuit. If it reduces it too much, the op amp will oscillate. This filter causes phase shift and will reduce the phase margin of the closed-loop system.

#BIAS AMP 2 TUTORIAL PC#

The reason is that with a large feedback resistor, the input capacitance of the op amp, and the stray capacitance on the pc board, an RC low-pass filter (LPF) is formed. If the op amp is connected as a follower and the impedances are balanced by putting a resistor in the feedback path, the system may become prone to oscillation. But if used, a bypass cap should be placed across the resistor to reduce the noise contribution of the resistor.Īll op amps have some input capacitance, both differential and common mode. On the other hand, if the op amp is powered from split supplies and one supply comes up before the other one, there may be latch-up problems with the ESD network, in which case it may be desirable to add some resistance to protect the part.

Output noise due to R1 is 40 nV/√Hz, for R2, 12.6 nV/√Hz, and for R3, 42 nV/√Hz. In Figure 2, surprisingly, even though the 909 Ω compensation resistor is the lowest value because of noise gain from that node to the output, it contributes the most noise at the Figure 2 output. The thermal noise of a resistor is given by √4kTRB, so a 1 kΩ resistor will be 4 nV/√Hz. In some cases, adding the resistor could result in the output error actually increasing. With the addition of input bias current cancellation, 2 the bias current is greatly reduced, but the input offset current can be 50% to 100% of the remaining bias current, so adding the resistor has very little effect. An example of this can be found in the OP07. To reduce the input bias current on bipolar op amps, input bias current cancellation was integrated into many op amp designs. Because the I offset was 10% to 20% of I bias, this would help in reducing the output offset error.įigure 1. Doing some algebraic manipulation, it can be shown that the error is reduced to I offset × R feedback. However, the transistor matching wasn’t that close, so the input bias currents were not equal, resulting in a difference in the input bias currents (called input offset current) by 10% to 20% of the input bias current.īy adding a resistance (R3 in Figure 1) in the noninverting input to ground, equal to the parallel combination of the input resistor and the feedback resistor, the impedances are made equal. Therefore, with betas of 40 to 70, the input bias current was about one microamp. To get reasonable speeds, the differential pair tail current was generally in the 10 μA to 20 μA range.

In the 1960s and 1970s, first generation op amps were manufactured on a plain vanilla bipolar process. Why did we start doing this and what changed so that it may not be the right thing to do today? In fact, it can lead to more dc error, more noise, and more instability. Over time, with different circuit techniques and different IC processes, this may not be the right thing to do. If you grew up with the 741 op amp,1 it was drilled into your head to balance resistances seen by the op amp inputs. This article explores why this rule of thumb came about and whether or not we should follow this practice. Automatically, we put equal impedances on both inputs of an op amp, as we were taught many years ago.

Bias amp 2 tutorial